HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. All of the mentioned b. Sensitivity is less with respect to the load capacitance c. Switching speed is more compared to CMOS d. High current drive capability 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. All of the mentioned b. None of the mentioned c. Pull down d. Pull up 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. High frequency characteristics c. All of the mentioned d. Higher gain 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Current source b. Divider c. Voltage source d. Buffer 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Buffer b. Finite off resistance c. Infinite on resistance d. Infinite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and net gate power b. Gate power dissipation and absorption c. Gate switching delay and gate power absorption d. Gate switching delay and gate power dissipation 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Ultraviolet light b. Visible light c. Fluorescent d. Infra red light 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. CMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. None of the mentioned c. Etching d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. MOSFET b. JFET c. Both BJT and MOSFETs d. BJT 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour decomposition b. Dry deposition c. Chemical deposition d. Chemical vapour deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Channel length b. Effective source voltage c. Effective drain voltage d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vss c. Vds d. Vg 17 / 50 17. What is the disadvantage of the MOS device? a. Unlimited current sinking b. Limited voltage sinking c. Limited voltage sourcing d. Limited current sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverter used in parallel b. Switches connected in series c. Switches connected in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Does not affect c. Decreases d. Increases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. None of the mentioned c. Both zero static power dissipation and high input impedance d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Drain b. Positive voltage rail c. Ground d. Source 22 / 50 22. What is the condition for non conducting mode? a. Vds lesser than Vgs b. Vgs = Vds = 0 c. Vgs lesser than Vds d. Vgs = Vds = Vs = 0 23 / 50 23. CMOS technology is used in developing which of the following? a. Microprocessors b. Digital logic circuits c. Microcontrollers d. All of the mentioned 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Drain region c. Channel region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. Low output capacitance c. Input capacitance does not affect speed of the gate d. High output capacitance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. To perform logic functions c. To amplify the input voltage d. Drive input loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Increases c. Decreases d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Exponentially increases b. Remains fairly constant c. Increases d. Decreases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type diffused layer on p-Substrate c. Heavily doped n-type diffused layer on p-Substrate d. Lightly doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Polysilicon layer c. Silicon-di-oxide layer d. Diffusion layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Cut-off region b. Linear region c. Saturation region d. Non saturation resistive region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Input current and output voltage c. Output current and input voltage d. Output current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low resistance path b. High resistance path c. Low impedance path d. High impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decrease in output capacitance b. Decreasing area occupied c. Decreasing input capacitance d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. None of the mentioned b. Local Oxidation of Silicon c. Etched field-oxide isolation or Local Oxidation of Silicon d. Etched field-oxide isolation 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low resistance b. High capacitance c. High resistance d. Low capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Semi symmetrical b. Pseudo symmetrical c. Non symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. All of the mentioned b. Carrier mobility c. Gate voltage above a threshold d. Length channel 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) lesser than Cbase(bipolar) b. Cs(MOS) lesser than Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cg(MOS) = Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Dispersion b. Decomposition c. Filtering d. Diffusion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. pMOS b. nMOS c. BiCMOS d. CMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Decreases c. Does not effect d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Capacitors b. Buffers c. Switches d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sulphuric acid b. Plasma c. Sodium chloride d. Hydrochloric acid 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Looser layer c. Larger feature size d. Small feature size 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Silicon c. Boron d. Oxygen 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Chemical Vapour Deposition b. Either Diffusion or Ion Implantation Process c. Diffusion process d. Ion Implantation process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Diffusion layer b. Metal layer c. Drain d. Source 50 / 50 50. Surface mobility depends on . . a. Effective gate voltage b. Effective source voltage c. Effective drain voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
