HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. All of the mentioned b. Switching speed is more compared to CMOS c. Sensitivity is less with respect to the load capacitance d. High current drive capability 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. None of the mentioned b. Pull down c. Pull up d. All of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. High frequency characteristics c. Higher gain d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Divider c. Current source d. Voltage source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite on resistance b. Buffer c. Finite off resistance d. Infinite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate switching delay and net gate power c. Gate switching delay and gate power absorption d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Fluorescent c. Visible light d. Ultraviolet light 9 / 50 9. Which has better I/A? a. CMOS b. Bipolar c. nMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Etching b. Doping impurities c. None of the mentioned d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. BJT b. MOSFET c. JFET d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour deposition b. Chemical vapour decomposition c. Chemical deposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Effective drain voltage c. Effective gate voltage d. Channel length 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vss c. Vg d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sinking b. Unlimited current sinking c. Limited voltage sourcing d. Limited current sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Switches connected in parallel c. Inverters used in series d. Inverter used in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Exponentially decreases c. Decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. None of the mentioned b. Zero static power dissipation c. Both zero static power dissipation and high input impedance d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Drain b. Ground c. Source d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = Vs = 0 b. Vds lesser than Vgs c. Vgs = Vds = 0 d. Vgs lesser than Vds 23 / 50 23. CMOS technology is used in developing which of the following? a. Microcontrollers b. Microprocessors c. All of the mentioned d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Channel region c. Drain region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. Low output capacitance c. High output capacitance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. Drive input loads c. To amplify the input voltage d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Increases c. Remains the same d. Decreases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Exponentially increases b. Decreases c. Remains fairly constant d. Increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Heavily doped n-type diffused layer on p-Substrate d. Lightly doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Diffusion layer c. Polysilicon layer d. Silicon-di-oxide layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Saturation region b. Non saturation resistive region c. Cut-off region d. Linear region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Output current and input voltage b. Input current and output voltage c. Output current and output voltage d. Input current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. Low impedance path c. Low resistance path d. High impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing input capacitance b. Increases input capacitance c. Decrease in output capacitance d. Decreasing area occupied 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation b. Local Oxidation of Silicon c. Etched field-oxide isolation or Local Oxidation of Silicon d. None of the mentioned 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low resistance b. Low capacitance c. High resistance d. High capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Semi symmetrical c. Symmetrical d. Non symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Carrier mobility b. Length channel c. All of the mentioned d. Gate voltage above a threshold 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) lesser than Cbase(bipolar) b. Cg(MOS) = Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cs(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Decomposition b. Diffusion c. Dispersion d. Filtering 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. BiCMOS b. pMOS c. nMOS d. CMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Does not effect c. Decreases d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Switches b. Buffers c. Capacitors d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Hydrochloric acid b. Sulphuric acid c. Plasma d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Larger feature size c. Small feature size d. Looser layer 47 / 50 47. Which is used for the interconnection? a. Silicon b. Aluminium c. Oxygen d. Boron 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Either Diffusion or Ion Implantation Process b. Ion Implantation process c. Chemical Vapour Deposition d. Diffusion process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Metal layer b. Diffusion layer c. Drain d. Source 50 / 50 50. Surface mobility depends on . . a. Effective source voltage b. Effective drain voltage c. Effective gate voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
