HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. Sensitivity is less with respect to the load capacitance c. High current drive capability d. All of the mentioned 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. None of the mentioned b. Pull up c. All of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. Higher gain b. High frequency characteristics c. Better noise characteristics d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Divider b. Buffer c. Voltage source d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Finite off resistance c. Infinite on resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate power dissipation and absorption b. Gate switching delay and net gate power c. Gate switching delay and gate power absorption d. Gate switching delay and gate power dissipation 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Visible light c. Fluorescent d. Ultraviolet light 9 / 50 9. Which has better I/A? a. pMOS b. CMOS c. nMOS d. Bipolar 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. None of the mentioned c. Etching d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. MOSFET b. BJT c. JFET d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour decomposition b. Chemical deposition c. Chemical vapour deposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Channel length c. Effective gate voltage d. Effective drain voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vds b. Vss c. Vg d. Vdd 17 / 50 17. What is the disadvantage of the MOS device? a. Unlimited current sinking b. Limited current sourcing c. Limited voltage sinking d. Limited voltage sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Inverter used in parallel c. Switches connected in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Decreases c. Does not affect d. Increases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. High Input impedance b. None of the mentioned c. Both zero static power dissipation and high input impedance d. Zero static power dissipation 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Ground b. Drain c. Source d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vgs = Vds = Vs = 0 c. Vgs lesser than Vds d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. All of the mentioned b. Microcontrollers c. Microprocessors d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Bulk region b. Switch region c. Channel region d. Drain region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High output capacitance b. Low output capacitance c. High on resistance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. Drive input loads c. To amplify the input voltage d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Increases b. Decreases c. Cannot be determined d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Decreases b. Increases c. Remains fairly constant d. Exponentially increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Heavily doped n-type diffused layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Lightly doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Polysilicon layer b. Diffusion layer c. Silicon-di-oxide layer d. Metal layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Saturation region b. Cut-off region c. Linear region d. Non saturation resistive region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Output current and output voltage b. Output current and input voltage c. Input current and input voltage d. Input current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. Low impedance path c. Low resistance path d. High impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decrease in output capacitance b. Decreasing area occupied c. Increases input capacitance d. Decreasing input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation or Local Oxidation of Silicon b. None of the mentioned c. Local Oxidation of Silicon d. Etched field-oxide isolation 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. Low capacitance c. High resistance d. Low resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Semi symmetrical b. Non symmetrical c. Pseudo symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. All of the mentioned c. Length channel d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cs(MOS) lesser than Cbase(bipolar) b. Cg(MOS) = Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cg(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Decomposition b. Filtering c. Dispersion d. Diffusion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. pMOS c. CMOS d. BiCMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Exponentially increases c. Decreases d. Does not effect 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Resistors c. Capacitors d. Switches 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Hydrochloric acid c. Sulphuric acid d. Plasma 46 / 50 46. What are the advantages of E-beam masks? a. Looser layer b. Larger feature size c. Complex design d. Small feature size 47 / 50 47. Which is used for the interconnection? a. Oxygen b. Aluminium c. Boron d. Silicon 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Either Diffusion or Ion Implantation Process c. Chemical Vapour Deposition d. Diffusion process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Drain b. Metal layer c. Diffusion layer d. Source 50 / 50 50. Surface mobility depends on . . a. Channel length b. Effective gate voltage c. Effective drain voltage d. Effective source voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
