HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. All of the mentioned c. High current drive capability d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull up b. All of the mentioned c. None of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. All of the mentioned b. Higher gain c. Better noise characteristics d. High frequency characteristics 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Divider b. Buffer c. Voltage source d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Finite off resistance b. Infinite on resistance c. Infinite off resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate switching delay and net gate power c. Gate switching delay and gate power absorption d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Visible light b. Ultraviolet light c. Infra red light d. Fluorescent 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. CMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. None of the mentioned b. Etching c. Doping impurities d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. MOSFET b. Both BJT and MOSFETs c. BJT d. JFET 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Dry deposition b. Chemical deposition c. Chemical vapour deposition d. Chemical vapour decomposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Effective gate voltage c. Effective drain voltage d. Channel length 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vss c. Vg d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sinking b. Limited current sourcing c. Unlimited current sinking d. Limited voltage sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Switches connected in parallel c. Inverter used in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Decreases b. Increases c. Exponentially decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. Both zero static power dissipation and high input impedance c. None of the mentioned d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Source b. Drain c. Ground d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = Vs = 0 b. Vgs = Vds = 0 c. Vgs lesser than Vds d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. Microcontrollers b. Microprocessors c. All of the mentioned d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Channel region b. Switch region c. Bulk region d. Drain region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. Low output capacitance b. Input capacitance does not affect speed of the gate c. High output capacitance d. High on resistance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. Drive input loads c. To amplify the input voltage d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Remains the same c. Increases d. Decreases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Exponentially increases b. Remains fairly constant c. Increases d. Decreases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type diffused layer on p-Substrate b. Heavily doped n-type epitaxial layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Lightly doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Polysilicon layer c. Silicon-di-oxide layer d. Metal layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Saturation region b. Linear region c. Cut-off region d. Non saturation resistive region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and output voltage b. Output current and output voltage c. Input current and input voltage d. Output current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low impedance path b. Low resistance path c. High impedance path d. High resistance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing input capacitance b. Increases input capacitance c. Decrease in output capacitance d. Decreasing area occupied 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. None of the mentioned b. Local Oxidation of Silicon c. Etched field-oxide isolation or Local Oxidation of Silicon d. Etched field-oxide isolation 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low capacitance b. High capacitance c. Low resistance d. High resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Semi symmetrical c. Symmetrical d. Non symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Carrier mobility b. Length channel c. Gate voltage above a threshold d. All of the mentioned 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) greater than Cbase(bipolar) b. Cg(MOS) = Cbase(bipolar) c. Cs(MOS) lesser than Cbase(bipolar) d. Cg(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Decomposition b. Diffusion c. Filtering d. Dispersion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists c. Positive photo resists are less sensitive to light d. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. BiCMOS c. pMOS d. CMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Does not effect c. Exponentially increases d. Decreases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Capacitors c. Switches d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Plasma b. Sulphuric acid c. Hydrochloric acid d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Small feature size c. Looser layer d. Larger feature size 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Oxygen c. Boron d. Silicon 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Chemical Vapour Deposition c. Diffusion process d. Either Diffusion or Ion Implantation Process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Diffusion layer b. Metal layer c. Source d. Drain 50 / 50 50. Surface mobility depends on . . a. Channel length b. Effective gate voltage c. Effective drain voltage d. Effective source voltage Your score is LinkedIn Facebook Twitter VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this