HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Sensitivity is less with respect to the load capacitance b. High current drive capability c. Switching speed is more compared to CMOS d. All of the mentioned 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. None of the mentioned b. Pull up c. All of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. High frequency characteristics b. Higher gain c. All of the mentioned d. Better noise characteristics 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Current source c. Voltage source d. Divider 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Buffer b. Finite off resistance c. Infinite on resistance d. Infinite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate power dissipation and absorption c. Gate switching delay and gate power absorption d. Gate switching delay and net gate power 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Visible light c. Ultraviolet light d. Fluorescent 9 / 50 9. Which has better I/A? a. CMOS b. nMOS c. Bipolar d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. None of the mentioned b. Etching c. Doping impurities d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. JFET b. BJT c. MOSFET d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Dry deposition b. Chemical vapour decomposition c. Chemical vapour deposition d. Chemical deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective gate voltage b. Effective drain voltage c. Channel length d. Effective source voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vg b. Vdd c. Vss d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sinking b. Limited voltage sourcing c. Unlimited current sinking d. Limited current sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Inverters used in series c. Inverter used in parallel d. Switches connected in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Does not affect c. Increases d. Decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Both zero static power dissipation and high input impedance b. Zero static power dissipation c. None of the mentioned d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Positive voltage rail b. Ground c. Source d. Drain 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vds lesser than Vgs c. Vgs = Vds = Vs = 0 d. Vgs lesser than Vds 23 / 50 23. CMOS technology is used in developing which of the following? a. Microcontrollers b. Microprocessors c. All of the mentioned d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Bulk region b. Switch region c. Channel region d. Drain region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High output capacitance b. Low output capacitance c. High on resistance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. To amplify the input voltage c. To perform logic functions d. Drive input loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Decreases b. Remains the same c. Cannot be determined d. Increases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Remains fairly constant b. Increases c. Exponentially increases d. Decreases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Lightly doped n-type diffused layer on p-Substrate b. Heavily doped n-type epitaxial layer on p-Substrate c. Heavily doped n-type diffused layer on p-Substrate d. Lightly doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Polysilicon layer c. Metal layer d. Silicon-di-oxide layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Non saturation resistive region b. Saturation region c. Cut-off region d. Linear region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and output voltage c. Output current and input voltage d. Input current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. Low resistance path c. High impedance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing area occupied b. Decrease in output capacitance c. Increases input capacitance d. Decreasing input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Local Oxidation of Silicon b. Etched field-oxide isolation c. None of the mentioned d. Etched field-oxide isolation or Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. Low resistance c. Low capacitance d. High resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Non symmetrical b. Symmetrical c. Semi symmetrical d. Pseudo symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Length channel b. Carrier mobility c. All of the mentioned d. Gate voltage above a threshold 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) = Cbase(bipolar) b. Cg(MOS) lesser than Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cs(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Diffusion b. Decomposition c. Filtering d. Dispersion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are less sensitive to light c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. CMOS b. pMOS c. nMOS d. BiCMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Exponentially increases b. Does not effect c. Decreases d. Increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Capacitors c. Switches d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Plasma b. Sulphuric acid c. Hydrochloric acid d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Larger feature size b. Complex design c. Small feature size d. Looser layer 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Boron c. Silicon d. Oxygen 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Chemical Vapour Deposition b. Ion Implantation process c. Diffusion process d. Either Diffusion or Ion Implantation Process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Metal layer b. Source c. Drain d. Diffusion layer 50 / 50 50. Surface mobility depends on . . a. Effective source voltage b. Effective gate voltage c. Effective drain voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this
