HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Sensitivity is less with respect to the load capacitance b. All of the mentioned c. High current drive capability d. Switching speed is more compared to CMOS 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. None of the mentioned b. Pull up c. All of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. High frequency characteristics c. Higher gain d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Current source c. Divider d. Voltage source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Infinite on resistance c. Finite off resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate power dissipation and absorption b. Gate switching delay and gate power dissipation c. Gate switching delay and net gate power d. Gate switching delay and gate power absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Ultraviolet light b. Infra red light c. Visible light d. Fluorescent 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. pMOS d. CMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. Photo resist c. None of the mentioned d. Etching 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. MOSFET b. JFET c. BJT d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Dry deposition b. Chemical vapour deposition c. Chemical vapour decomposition d. Chemical deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Effective drain voltage c. Channel length d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vds b. Vdd c. Vg d. Vss 17 / 50 17. What is the disadvantage of the MOS device? a. Unlimited current sinking b. Limited current sourcing c. Limited voltage sourcing d. Limited voltage sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Switches connected in parallel c. Inverter used in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Decreases c. Exponentially decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. High Input impedance c. Both zero static power dissipation and high input impedance d. None of the mentioned 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Ground b. Source c. Drain d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vds lesser than Vgs c. Vgs lesser than Vds d. Vgs = Vds = Vs = 0 23 / 50 23. CMOS technology is used in developing which of the following? a. Microprocessors b. Digital logic circuits c. All of the mentioned d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Channel region b. Drain region c. Switch region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. Low output capacitance b. High on resistance c. High output capacitance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. To perform logic functions c. To amplify the input voltage d. Drive input loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Decreases b. Cannot be determined c. Increases d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Increases b. Exponentially increases c. Remains fairly constant d. Decreases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Heavily doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Silicon-di-oxide layer b. Metal layer c. Diffusion layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Cut-off region b. Linear region c. Non saturation resistive region d. Saturation region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Output current and input voltage b. Output current and output voltage c. Input current and output voltage d. Input current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low impedance path b. High resistance path c. Low resistance path d. High impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing area occupied b. Decreasing input capacitance c. Decrease in output capacitance d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Local Oxidation of Silicon b. Etched field-oxide isolation c. None of the mentioned d. Etched field-oxide isolation or Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low capacitance b. High resistance c. High capacitance d. Low resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Semi symmetrical c. Symmetrical d. Non symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Carrier mobility b. Length channel c. All of the mentioned d. Gate voltage above a threshold 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) lesser than Cbase(bipolar) b. Cs(MOS) lesser than Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cg(MOS) = Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Decomposition b. Dispersion c. Diffusion d. Filtering 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. CMOS c. BiCMOS d. pMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Decreases b. Increases c. Exponentially increases d. Does not effect 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Switches c. Resistors d. Capacitors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Plasma c. Sulphuric acid d. Hydrochloric acid 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Looser layer c. Small feature size d. Larger feature size 47 / 50 47. Which is used for the interconnection? a. Silicon b. Boron c. Oxygen d. Aluminium 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Diffusion process b. Either Diffusion or Ion Implantation Process c. Chemical Vapour Deposition d. Ion Implantation process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Diffusion layer b. Drain c. Source d. Metal layer 50 / 50 50. Surface mobility depends on . . a. Effective drain voltage b. Effective gate voltage c. Channel length d. Effective source voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
