HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. All of the mentioned c. High current drive capability d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull down b. All of the mentioned c. Pull up d. None of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. High frequency characteristics b. Better noise characteristics c. Higher gain d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Voltage source c. Divider d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Buffer b. Finite off resistance c. Infinite off resistance d. Infinite on resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate switching delay and net gate power c. Gate power dissipation and absorption d. Gate switching delay and gate power absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Visible light c. Ultraviolet light d. Fluorescent 9 / 50 9. Which has better I/A? a. Bipolar b. pMOS c. nMOS d. CMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Etching b. Photo resist c. None of the mentioned d. Doping impurities 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. MOSFET b. Both BJT and MOSFETs c. JFET d. BJT 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour deposition b. Dry deposition c. Chemical vapour decomposition d. Chemical deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective drain voltage b. Effective source voltage c. Channel length d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vg c. Vss d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sinking b. Unlimited current sinking c. Limited voltage sourcing d. Limited current sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Inverters used in series c. Inverter used in parallel d. Switches connected in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Does not affect b. Exponentially decreases c. Increases d. Decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Both zero static power dissipation and high input impedance b. None of the mentioned c. High Input impedance d. Zero static power dissipation 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Drain b. Positive voltage rail c. Source d. Ground 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vgs = Vds = Vs = 0 c. Vds lesser than Vgs d. Vgs lesser than Vds 23 / 50 23. CMOS technology is used in developing which of the following? a. All of the mentioned b. Digital logic circuits c. Microprocessors d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Drain region b. Bulk region c. Switch region d. Channel region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. High output capacitance c. Input capacitance does not affect speed of the gate d. Low output capacitance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive input loads b. To amplify the input voltage c. Drive output loads d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Remains the same b. Cannot be determined c. Increases d. Decreases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Decreases b. Increases c. Remains fairly constant d. Exponentially increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type diffused layer on p-Substrate b. Lightly doped n-type diffused layer on p-Substrate c. Lightly doped n-type epitaxial layer on p-Substrate d. Heavily doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Metal layer c. Silicon-di-oxide layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Non saturation resistive region b. Linear region c. Cut-off region d. Saturation region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and output voltage b. Output current and input voltage c. Output current and output voltage d. Input current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High impedance path b. Low resistance path c. Low impedance path d. High resistance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decrease in output capacitance b. Increases input capacitance c. Decreasing input capacitance d. Decreasing area occupied 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Local Oxidation of Silicon b. Etched field-oxide isolation c. Etched field-oxide isolation or Local Oxidation of Silicon d. None of the mentioned 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low capacitance b. High resistance c. Low resistance d. High capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Symmetrical c. Semi symmetrical d. Non symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. Length channel c. All of the mentioned d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) greater than Cbase(bipolar) b. Cs(MOS) lesser than Cbase(bipolar) c. Cg(MOS) = Cbase(bipolar) d. Cg(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Filtering b. Decomposition c. Diffusion d. Dispersion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are less sensitive to light b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Negative photo resists are less sensitive to light d. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. CMOS c. pMOS d. BiCMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Decreases b. Increases c. Exponentially increases d. Does not effect 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Resistors b. Buffers c. Switches d. Capacitors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Hydrochloric acid c. Plasma d. Sulphuric acid 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Larger feature size c. Small feature size d. Looser layer 47 / 50 47. Which is used for the interconnection? a. Boron b. Oxygen c. Aluminium d. Silicon 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Diffusion process b. Ion Implantation process c. Chemical Vapour Deposition d. Either Diffusion or Ion Implantation Process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Source b. Metal layer c. Drain d. Diffusion layer 50 / 50 50. Surface mobility depends on . . a. Effective gate voltage b. Channel length c. Effective drain voltage d. Effective source voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this