HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. All of the mentioned b. Switching speed is more compared to CMOS c. High current drive capability d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull down b. None of the mentioned c. Pull up d. All of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. Higher gain b. All of the mentioned c. Better noise characteristics d. High frequency characteristics 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Voltage source b. Current source c. Divider d. Buffer 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Infinite on resistance c. Finite off resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate power dissipation and absorption c. Gate switching delay and gate power absorption d. Gate switching delay and net gate power 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Visible light b. Ultraviolet light c. Fluorescent d. Infra red light 9 / 50 9. Which has better I/A? a. CMOS b. nMOS c. pMOS d. Bipolar 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. Photo resist c. None of the mentioned d. Etching 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. JFET b. Both BJT and MOSFETs c. MOSFET d. BJT 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical deposition b. Dry deposition c. Chemical vapour decomposition d. Chemical vapour deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Channel length b. Effective source voltage c. Effective drain voltage d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vss b. Vdd c. Vds d. Vg 17 / 50 17. What is the disadvantage of the MOS device? a. Limited current sourcing b. Limited voltage sinking c. Limited voltage sourcing d. Unlimited current sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Inverters used in series c. Switches connected in parallel d. Inverter used in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Exponentially decreases c. Decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. None of the mentioned c. Both zero static power dissipation and high input impedance d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Ground b. Drain c. Positive voltage rail d. Source 22 / 50 22. What is the condition for non conducting mode? a. Vgs lesser than Vds b. Vgs = Vds = 0 c. Vgs = Vds = Vs = 0 d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. Digital logic circuits b. Microprocessors c. All of the mentioned d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Drain region b. Bulk region c. Channel region d. Switch region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. Input capacitance does not affect speed of the gate b. High output capacitance c. Low output capacitance d. High on resistance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. To perform logic functions b. To amplify the input voltage c. Drive input loads d. Drive output loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Decreases b. Remains the same c. Cannot be determined d. Increases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Increases b. Decreases c. Exponentially increases d. Remains fairly constant 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Heavily doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Metal layer c. Silicon-di-oxide layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Saturation region b. Cut-off region c. Linear region d. Non saturation resistive region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and input voltage c. Output current and output voltage d. Input current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. Low impedance path c. High impedance path d. Low resistance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing input capacitance b. Decrease in output capacitance c. Decreasing area occupied d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation b. Etched field-oxide isolation or Local Oxidation of Silicon c. Local Oxidation of Silicon d. None of the mentioned 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. Low capacitance c. Low resistance d. High resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Semi symmetrical b. Pseudo symmetrical c. Non symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Length channel b. All of the mentioned c. Gate voltage above a threshold d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cs(MOS) lesser than Cbase(bipolar) b. Cg(MOS) lesser than Cbase(bipolar) c. Cg(MOS) = Cbase(bipolar) d. Cg(MOS) greater than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Diffusion b. Dispersion c. Filtering d. Decomposition 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. pMOS b. CMOS c. BiCMOS d. nMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Does not effect b. Exponentially increases c. Decreases d. Increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Resistors b. Buffers c. Capacitors d. Switches 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Plasma b. Sodium chloride c. Sulphuric acid d. Hydrochloric acid 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Small feature size c. Looser layer d. Larger feature size 47 / 50 47. Which is used for the interconnection? a. Silicon b. Aluminium c. Oxygen d. Boron 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Diffusion process b. Ion Implantation process c. Either Diffusion or Ion Implantation Process d. Chemical Vapour Deposition 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Drain b. Diffusion layer c. Source d. Metal layer 50 / 50 50. Surface mobility depends on . . a. Effective gate voltage b. Effective source voltage c. Effective drain voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
