HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. High current drive capability b. Switching speed is more compared to CMOS c. All of the mentioned d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. All of the mentioned b. None of the mentioned c. Pull up d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. Higher gain c. High frequency characteristics d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Divider b. Current source c. Buffer d. Voltage source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Finite off resistance c. Buffer d. Infinite on resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and net gate power b. Gate switching delay and gate power absorption c. Gate switching delay and gate power dissipation d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Fluorescent b. Infra red light c. Ultraviolet light d. Visible light 9 / 50 9. Which has better I/A? a. nMOS b. CMOS c. pMOS d. Bipolar 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Photo resist b. None of the mentioned c. Doping impurities d. Etching 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. JFET b. MOSFET c. Both BJT and MOSFETs d. BJT 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour decomposition b. Chemical vapour deposition c. Chemical deposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Effective gate voltage c. Channel length d. Effective drain voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vg c. Vss d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Unlimited current sinking b. Limited current sourcing c. Limited voltage sourcing d. Limited voltage sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverters used in series b. Switches connected in parallel c. Inverter used in parallel d. Switches connected in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Does not affect b. Exponentially decreases c. Increases d. Decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. None of the mentioned b. Both zero static power dissipation and high input impedance c. Zero static power dissipation d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Source b. Ground c. Drain d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs lesser than Vds b. Vds lesser than Vgs c. Vgs = Vds = 0 d. Vgs = Vds = Vs = 0 23 / 50 23. CMOS technology is used in developing which of the following? a. Digital logic circuits b. Microprocessors c. All of the mentioned d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Drain region c. Channel region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. High output capacitance c. Low output capacitance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive input loads b. Drive output loads c. To perform logic functions d. To amplify the input voltage 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Decreases c. Increases d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Exponentially increases b. Increases c. Decreases d. Remains fairly constant 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Heavily doped n-type diffused layer on p-Substrate c. Lightly doped n-type epitaxial layer on p-Substrate d. Lightly doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Polysilicon layer b. Silicon-di-oxide layer c. Metal layer d. Diffusion layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Cut-off region b. Linear region c. Saturation region d. Non saturation resistive region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and output voltage b. Input current and input voltage c. Output current and input voltage d. Output current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High impedance path b. High resistance path c. Low resistance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing area occupied b. Decreasing input capacitance c. Decrease in output capacitance d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation or Local Oxidation of Silicon b. Etched field-oxide isolation c. Local Oxidation of Silicon d. None of the mentioned 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low capacitance b. High capacitance c. High resistance d. Low resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Symmetrical b. Non symmetrical c. Pseudo symmetrical d. Semi symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Length channel b. Gate voltage above a threshold c. All of the mentioned d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) = Cbase(bipolar) b. Cs(MOS) lesser than Cbase(bipolar) c. Cg(MOS) lesser than Cbase(bipolar) d. Cg(MOS) greater than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Dispersion b. Decomposition c. Filtering d. Diffusion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are less sensitive to light c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. pMOS b. CMOS c. BiCMOS d. nMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Does not effect b. Increases c. Decreases d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Switches c. Capacitors d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Hydrochloric acid b. Plasma c. Sulphuric acid d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Larger feature size b. Small feature size c. Looser layer d. Complex design 47 / 50 47. Which is used for the interconnection? a. Silicon b. Boron c. Oxygen d. Aluminium 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Diffusion process c. Either Diffusion or Ion Implantation Process d. Chemical Vapour Deposition 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Drain b. Source c. Diffusion layer d. Metal layer 50 / 50 50. Surface mobility depends on . . a. Effective gate voltage b. Channel length c. Effective source voltage d. Effective drain voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
