HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Sensitivity is less with respect to the load capacitance b. Switching speed is more compared to CMOS c. High current drive capability d. All of the mentioned 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull down b. Pull up c. None of the mentioned d. All of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. All of the mentioned b. High frequency characteristics c. Better noise characteristics d. Higher gain 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Voltage source c. Divider d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Infinite on resistance c. Finite off resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and net gate power b. Gate switching delay and gate power dissipation c. Gate switching delay and gate power absorption d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Fluorescent c. Ultraviolet light d. Visible light 9 / 50 9. Which has better I/A? a. CMOS b. Bipolar c. nMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. Photo resist c. None of the mentioned d. Etching 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. BJT b. Both BJT and MOSFETs c. MOSFET d. JFET 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical deposition b. Chemical vapour decomposition c. Chemical vapour deposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective drain voltage b. Effective gate voltage c. Effective source voltage d. Channel length 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vds b. Vdd c. Vss d. Vg 17 / 50 17. What is the disadvantage of the MOS device? a. Limited current sourcing b. Limited voltage sourcing c. Limited voltage sinking d. Unlimited current sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in parallel b. Switches connected in series c. Inverters used in series d. Inverter used in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Does not affect c. Decreases d. Increases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. None of the mentioned b. Zero static power dissipation c. Both zero static power dissipation and high input impedance d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Ground b. Source c. Drain d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vds lesser than Vgs c. Vgs lesser than Vds d. Vgs = Vds = Vs = 0 23 / 50 23. CMOS technology is used in developing which of the following? a. All of the mentioned b. Microprocessors c. Microcontrollers d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Bulk region c. Drain region d. Channel region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. Low output capacitance b. Input capacitance does not affect speed of the gate c. High on resistance d. High output capacitance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. To amplify the input voltage c. To perform logic functions d. Drive input loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Remains the same b. Decreases c. Increases d. Cannot be determined 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Exponentially increases b. Remains fairly constant c. Decreases d. Increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type diffused layer on p-Substrate b. Heavily doped n-type epitaxial layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Lightly doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Silicon-di-oxide layer c. Diffusion layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Linear region b. Non saturation resistive region c. Saturation region d. Cut-off region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and output voltage b. Output current and input voltage c. Input current and input voltage d. Output current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High impedance path b. Low resistance path c. High resistance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing input capacitance b. Decrease in output capacitance c. Increases input capacitance d. Decreasing area occupied 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation or Local Oxidation of Silicon b. None of the mentioned c. Local Oxidation of Silicon d. Etched field-oxide isolation 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High resistance b. Low resistance c. Low capacitance d. High capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Non symmetrical b. Semi symmetrical c. Pseudo symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Length channel b. All of the mentioned c. Gate voltage above a threshold d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) = Cbase(bipolar) b. Cg(MOS) lesser than Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cs(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Diffusion b. Dispersion c. Filtering d. Decomposition 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists c. Negative photo resists are less sensitive to light d. Positive photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. BiCMOS b. CMOS c. nMOS d. pMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Does not effect c. Decreases d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Switches b. Capacitors c. Resistors d. Buffers 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Hydrochloric acid b. Sulphuric acid c. Plasma d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Small feature size b. Looser layer c. Complex design d. Larger feature size 47 / 50 47. Which is used for the interconnection? a. Boron b. Silicon c. Oxygen d. Aluminium 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Either Diffusion or Ion Implantation Process b. Chemical Vapour Deposition c. Ion Implantation process d. Diffusion process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Diffusion layer b. Metal layer c. Drain d. Source 50 / 50 50. Surface mobility depends on . . a. Effective drain voltage b. Effective source voltage c. Effective gate voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
