VLSI online test mcq (part1)

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VLSI

VLSI (part1)

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1. The BiCMOS are preferred over CMOS due to . . . . . . . .

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2. In nMOS inverter configuration depletion mode device is called as . . . . . . .

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3. What are the advantages of BiCMOS?

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4. Substrate bias voltage is positive for nMOS.

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5. If both the transistors are in saturation, then they act as . . . . . . . .

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6. In CMOS inverter, transistor is a switch having . . . . . . . .

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7. Speed power product is measured as the product of . . . . . . . .

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8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . .

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9. Which has better I/A?

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10. The . . . . . . . . is used to reduce the resistivity of poly silicon.

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11. The transistors used in BiCMOS are . . . . . . . .

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12. Substrate doping level should be decreased to avoid the latch-up effect.

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13. Heavily doped polysilicon is deposited using . . . . . .

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14. Surface mobility depends on . . . . . . . .

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15. BiCMOS inverter requires high load current sourcing

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16. Ids depends on . . . . . . .

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17. What is the disadvantage of the MOS device?

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18. Pass transistors are transistors used as . . . . . . .

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19. Increasing fan-out . . . . . . . . the propagation delay.

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20. The MOSFETS are arranged in this configuration to provide . . . . . . . .

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21. For depletion mode transistor, gate should be connected to . . . . . . . .

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22. What is the condition for non conducting mode?

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23. CMOS technology is used in developing which of the following?

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24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . .

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25. Fast gate can be built by keeping . . . . . . . .

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26. In BiCMOS, MOS switches are used to . . . . . .

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27. As die size shrinks, the complexity of making the photomasks . . . . . . .

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28. The current Ids . . . . . . . . as Vds increases.

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29. The n-well collector is formed by . . . . . . .

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30. Interconnection pattern is made on . . . . . .

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31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . .

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32. Transconductance gives the relationship between . . . . . . .

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33. Latch-up is the generation of . . . . . . .

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34. Increasing the transconductance . . . . . .

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35. The isolated active areas are created by technique known as . . . . . .

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36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path.

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37. MOS transistor structure is . . . . . .

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38. Switching speed of a MOS device depends on . . . . . .

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39. Which of the following is true when inputs are controlled by equal amounts of charge?

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40. N-well is formed by . . . . . . . .

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41. Positive photo resists are used more than negative photo resists because . . . . . . . .

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42. Which process produces a circuit which is less prone to latch-up effect?

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43. Increasing Vsb . . . . . . . . the threshold voltage.

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44. Depletion mode MOSFETs are more commonly used as . . . . . . . .

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45. In nMOS fabrication, etching is done using . . . . . . . . .

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46. What are the advantages of E-beam masks?

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47. Which is used for the interconnection?

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48. The dopants are introduced in the active areas of silicon by using which process?

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49. Contact cuts are made in . . . . . . . . .

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50. Surface mobility depends on . .

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