HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Sensitivity is less with respect to the load capacitance b. All of the mentioned c. High current drive capability d. Switching speed is more compared to CMOS 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. None of the mentioned b. Pull up c. All of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. Higher gain c. High frequency characteristics d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Buffer b. Divider c. Voltage source d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Buffer c. Infinite on resistance d. Finite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and net gate power b. Gate switching delay and gate power dissipation c. Gate switching delay and gate power absorption d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Visible light c. Ultraviolet light d. Fluorescent 9 / 50 9. Which has better I/A? a. nMOS b. pMOS c. CMOS d. Bipolar 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Photo resist b. Etching c. Doping impurities d. None of the mentioned 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. Both BJT and MOSFETs b. BJT c. MOSFET d. JFET 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour decomposition b. Chemical deposition c. Dry deposition d. Chemical vapour deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective drain voltage b. Channel length c. Effective gate voltage d. Effective source voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vss c. Vds d. Vg 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sourcing b. Limited voltage sinking c. Limited current sourcing d. Unlimited current sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverter used in parallel b. Inverters used in series c. Switches connected in parallel d. Switches connected in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Decreases c. Does not affect d. Exponentially decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Both zero static power dissipation and high input impedance b. None of the mentioned c. High Input impedance d. Zero static power dissipation 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Drain b. Source c. Ground d. Positive voltage rail 22 / 50 22. What is the condition for non conducting mode? a. Vgs lesser than Vds b. Vgs = Vds = Vs = 0 c. Vgs = Vds = 0 d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. Microprocessors b. Microcontrollers c. Digital logic circuits d. All of the mentioned 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Drain region b. Bulk region c. Switch region d. Channel region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High output capacitance b. Input capacitance does not affect speed of the gate c. High on resistance d. Low output capacitance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. To perform logic functions b. Drive output loads c. Drive input loads d. To amplify the input voltage 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Increases b. Remains the same c. Decreases d. Cannot be determined 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Increases b. Remains fairly constant c. Decreases d. Exponentially increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Heavily doped n-type diffused layer on p-Substrate d. Lightly doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Silicon-di-oxide layer c. Polysilicon layer d. Diffusion layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Non saturation resistive region b. Cut-off region c. Linear region d. Saturation region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and output voltage c. Input current and output voltage d. Output current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low resistance path b. High impedance path c. High resistance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decreasing input capacitance b. Decrease in output capacitance c. Decreasing area occupied d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation b. Etched field-oxide isolation or Local Oxidation of Silicon c. None of the mentioned d. Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. Low capacitance c. High resistance d. Low resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Semi symmetrical b. Symmetrical c. Non symmetrical d. Pseudo symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Length channel b. Gate voltage above a threshold c. Carrier mobility d. All of the mentioned 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) lesser than Cbase(bipolar) b. Cg(MOS) greater than Cbase(bipolar) c. Cg(MOS) = Cbase(bipolar) d. Cs(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Dispersion b. Decomposition c. Filtering d. Diffusion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. CMOS b. BiCMOS c. nMOS d. pMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Exponentially increases b. Does not effect c. Increases d. Decreases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Switches b. Capacitors c. Buffers d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sulphuric acid b. Sodium chloride c. Hydrochloric acid d. Plasma 46 / 50 46. What are the advantages of E-beam masks? a. Small feature size b. Looser layer c. Larger feature size d. Complex design 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Boron c. Silicon d. Oxygen 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Diffusion process c. Chemical Vapour Deposition d. Either Diffusion or Ion Implantation Process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Source b. Drain c. Diffusion layer d. Metal layer 50 / 50 50. Surface mobility depends on . . a. Effective drain voltage b. Channel length c. Effective source voltage d. Effective gate voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
