HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Sensitivity is less with respect to the load capacitance b. High current drive capability c. All of the mentioned d. Switching speed is more compared to CMOS 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull up b. All of the mentioned c. Pull down d. None of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. Higher gain b. Better noise characteristics c. High frequency characteristics d. All of the mentioned 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Current source b. Buffer c. Voltage source d. Divider 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Finite off resistance b. Infinite off resistance c. Buffer d. Infinite on resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate power dissipation and absorption b. Gate switching delay and gate power dissipation c. Gate switching delay and net gate power d. Gate switching delay and gate power absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Visible light b. Ultraviolet light c. Infra red light d. Fluorescent 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. CMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. Photo resist c. None of the mentioned d. Etching 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. Both BJT and MOSFETs b. JFET c. MOSFET d. BJT 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical deposition b. Dry deposition c. Chemical vapour deposition d. Chemical vapour decomposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective drain voltage b. Channel length c. Effective source voltage d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vds b. Vg c. Vdd d. Vss 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sourcing b. Unlimited current sinking c. Limited voltage sinking d. Limited current sourcing 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Inverters used in series c. Switches connected in parallel d. Inverter used in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Exponentially decreases c. Does not affect d. Decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. None of the mentioned c. Both zero static power dissipation and high input impedance d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Positive voltage rail b. Ground c. Drain d. Source 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vgs = Vds = Vs = 0 c. Vgs lesser than Vds d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. Digital logic circuits b. All of the mentioned c. Microprocessors d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Channel region c. Drain region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High output capacitance b. Low output capacitance c. High on resistance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive output loads b. To amplify the input voltage c. Drive input loads d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Increases b. Remains the same c. Decreases d. Cannot be determined 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Decreases b. Exponentially increases c. Increases d. Remains fairly constant 29 / 50 29. The n-well collector is formed by . . . . . . . a. Lightly doped n-type diffused layer on p-Substrate b. Heavily doped n-type diffused layer on p-Substrate c. Lightly doped n-type epitaxial layer on p-Substrate d. Heavily doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Polysilicon layer c. Silicon-di-oxide layer d. Metal layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Non saturation resistive region b. Linear region c. Cut-off region d. Saturation region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and input voltage c. Output current and output voltage d. Input current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. High impedance path c. Low resistance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Increases input capacitance b. Decreasing input capacitance c. Decreasing area occupied d. Decrease in output capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Local Oxidation of Silicon b. Etched field-oxide isolation or Local Oxidation of Silicon c. Etched field-oxide isolation d. None of the mentioned 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low resistance b. Low capacitance c. High capacitance d. High resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Semi symmetrical b. Non symmetrical c. Symmetrical d. Pseudo symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. Length channel c. All of the mentioned d. Carrier mobility 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cs(MOS) lesser than Cbase(bipolar) b. Cg(MOS) lesser than Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cg(MOS) = Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Dispersion b. Decomposition c. Filtering d. Diffusion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists b. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. pMOS b. nMOS c. BiCMOS d. CMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Does not effect c. Exponentially increases d. Decreases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Capacitors b. Switches c. Resistors d. Buffers 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Plasma b. Hydrochloric acid c. Sulphuric acid d. Sodium chloride 46 / 50 46. What are the advantages of E-beam masks? a. Looser layer b. Larger feature size c. Small feature size d. Complex design 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Oxygen c. Silicon d. Boron 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Chemical Vapour Deposition b. Diffusion process c. Either Diffusion or Ion Implantation Process d. Ion Implantation process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Source b. Metal layer c. Drain d. Diffusion layer 50 / 50 50. Surface mobility depends on . . a. Effective gate voltage b. Effective drain voltage c. Channel length d. Effective source voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this