VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. All of the mentioned c. High current drive capability d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull down b. Pull up c. None of the mentioned d. All of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. All of the mentioned b. Better noise characteristics c. High frequency characteristics d. Higher gain 4 / 50 4. Substrate bias voltage is positive for nMOS. a. False b. True 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Voltage source b. Divider c. Current source d. Buffer 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite on resistance b. Buffer c. Infinite off resistance d. Finite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power dissipation b. Gate switching delay and net gate power c. Gate switching delay and gate power absorption d. Gate power dissipation and absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Fluorescent b. Infra red light c. Ultraviolet light d. Visible light 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. pMOS d. CMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Doping impurities b. Etching c. Photo resist d. None of the mentioned 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. BJT b. JFET c. MOSFET d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Dry deposition b. Chemical deposition c. Chemical vapour decomposition d. Chemical vapour deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective gate voltage b. Effective source voltage c. Effective drain voltage d. Channel length 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vg b. Vdd c. Vss d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sinking b. Limited current sourcing c. Limited voltage sourcing d. Unlimited current sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Switches connected in series b. Switches connected in parallel c. Inverter used in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Increases b. Exponentially decreases c. Decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Both zero static power dissipation and high input impedance b. Zero static power dissipation c. High Input impedance d. None of the mentioned 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Ground b. Positive voltage rail c. Drain d. Source 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = Vs = 0 b. Vgs = Vds = 0 c. Vgs lesser than Vds d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. All of the mentioned b. Microcontrollers c. Microprocessors d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Channel region b. Switch region c. Drain region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. High output capacitance c. Input capacitance does not affect speed of the gate d. Low output capacitance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive input loads b. To amplify the input voltage c. Drive output loads d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Decreases c. Increases d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Remains fairly constant b. Exponentially increases c. Decreases d. Increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Lightly doped n-type diffused layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Heavily doped n-type epitaxial layer on p-Substrate d. Heavily doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Diffusion layer b. Metal layer c. Silicon-di-oxide layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Non saturation resistive region b. Saturation region c. Cut-off region d. Linear region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and output voltage b. Output current and output voltage c. Output current and input voltage d. Input current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. High resistance path b. Low impedance path c. High impedance path d. Low resistance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decrease in output capacitance b. Increases input capacitance c. Decreasing area occupied d. Decreasing input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. None of the mentioned b. Etched field-oxide isolation or Local Oxidation of Silicon c. Local Oxidation of Silicon d. Etched field-oxide isolation 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. Low capacitance c. High resistance d. Low resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Symmetrical b. Pseudo symmetrical c. Non symmetrical d. Semi symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. Length channel c. Carrier mobility d. All of the mentioned 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) greater than Cbase(bipolar) b. Cs(MOS) lesser than Cbase(bipolar) c. Cg(MOS) = Cbase(bipolar) d. Cg(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Filtering b. Decomposition c. Diffusion d. Dispersion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Positive photo resists are less sensitive to light b. Negative photo resists are less sensitive to light c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. CMOS b. pMOS c. BiCMOS d. nMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Does not effect b. Exponentially increases c. Increases d. Decreases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Buffers b. Switches c. Capacitors d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sulphuric acid b. Sodium chloride c. Hydrochloric acid d. Plasma 46 / 50 46. What are the advantages of E-beam masks? a. Complex design b. Small feature size c. Larger feature size d. Looser layer 47 / 50 47. Which is used for the interconnection? a. Oxygen b. Aluminium c. Silicon d. Boron 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Chemical Vapour Deposition b. Diffusion process c. Ion Implantation process d. Either Diffusion or Ion Implantation Process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Metal layer b. Diffusion layer c. Drain d. Source 50 / 50 50. Surface mobility depends on . . a. Effective source voltage b. Channel length c. Effective gate voltage d. Effective drain voltage Your score is LinkedIn Facebook Twitter VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this