HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. High current drive capability c. Sensitivity is less with respect to the load capacitance d. All of the mentioned 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. All of the mentioned b. Pull up c. None of the mentioned d. Pull down 3 / 50 3. What are the advantages of BiCMOS? a. High frequency characteristics b. Better noise characteristics c. All of the mentioned d. Higher gain 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Divider b. Voltage source c. Buffer d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Infinite off resistance b. Finite off resistance c. Infinite on resistance d. Buffer 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate power dissipation and absorption b. Gate switching delay and gate power dissipation c. Gate switching delay and net gate power d. Gate switching delay and gate power absorption 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Infra red light b. Fluorescent c. Visible light d. Ultraviolet light 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. pMOS d. CMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Photo resist b. Etching c. None of the mentioned d. Doping impurities 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. BJT b. MOSFET c. Both BJT and MOSFETs d. JFET 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. False b. True 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour decomposition b. Dry deposition c. Chemical vapour deposition d. Chemical deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Effective source voltage b. Effective gate voltage c. Effective drain voltage d. Channel length 15 / 50 15. BiCMOS inverter requires high load current sourcing a. False b. True 16 / 50 16. Ids depends on . . . . . . . a. Vss b. Vg c. Vdd d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited current sourcing b. Limited voltage sourcing c. Unlimited current sinking d. Limited voltage sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverters used in series b. Switches connected in series c. Inverter used in parallel d. Switches connected in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Increases c. Decreases d. Does not affect 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. Zero static power dissipation b. High Input impedance c. None of the mentioned d. Both zero static power dissipation and high input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Positive voltage rail b. Source c. Ground d. Drain 22 / 50 22. What is the condition for non conducting mode? a. Vgs lesser than Vds b. Vgs = Vds = 0 c. Vds lesser than Vgs d. Vgs = Vds = Vs = 0 23 / 50 23. CMOS technology is used in developing which of the following? a. All of the mentioned b. Microprocessors c. Microcontrollers d. Digital logic circuits 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Switch region b. Bulk region c. Channel region d. Drain region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. Input capacitance does not affect speed of the gate b. High output capacitance c. Low output capacitance d. High on resistance 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. Drive input loads b. Drive output loads c. To perform logic functions d. To amplify the input voltage 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Remains the same c. Decreases d. Increases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Remains fairly constant b. Increases c. Exponentially increases d. Decreases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Lightly doped n-type diffused layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Heavily doped n-type diffused layer on p-Substrate d. Heavily doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Polysilicon layer c. Diffusion layer d. Silicon-di-oxide layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Linear region b. Saturation region c. Non saturation resistive region d. Cut-off region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Output current and output voltage b. Input current and input voltage c. Output current and input voltage d. Input current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low resistance path b. High resistance path c. High impedance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Decrease in output capacitance b. Decreasing area occupied c. Decreasing input capacitance d. Increases input capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation b. Local Oxidation of Silicon c. None of the mentioned d. Etched field-oxide isolation or Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High resistance b. Low resistance c. Low capacitance d. High capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Symmetrical b. Pseudo symmetrical c. Semi symmetrical d. Non symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. Length channel c. Carrier mobility d. All of the mentioned 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cs(MOS) lesser than Cbase(bipolar) b. Cg(MOS) = Cbase(bipolar) c. Cg(MOS) greater than Cbase(bipolar) d. Cg(MOS) lesser than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Filtering b. Diffusion c. Decomposition d. Dispersion 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists b. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists c. Positive photo resists are less sensitive to light d. Negative photo resists are less sensitive to light 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. CMOS b. pMOS c. BiCMOS d. nMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Decreases b. Increases c. Does not effect d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Resistors b. Switches c. Capacitors d. Buffers 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Hydrochloric acid c. Sulphuric acid d. Plasma 46 / 50 46. What are the advantages of E-beam masks? a. Larger feature size b. Small feature size c. Complex design d. Looser layer 47 / 50 47. Which is used for the interconnection? a. Aluminium b. Boron c. Silicon d. Oxygen 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Chemical Vapour Deposition c. Either Diffusion or Ion Implantation Process d. Diffusion process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Diffusion layer b. Source c. Metal layer d. Drain 50 / 50 50. Surface mobility depends on . . a. Channel length b. Effective drain voltage c. Effective source voltage d. Effective gate voltage Your score is LinkedIn Facebook Twitter VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Share this