HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. High current drive capability b. Switching speed is more compared to CMOS c. All of the mentioned d. Sensitivity is less with respect to the load capacitance 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull up b. Pull down c. All of the mentioned d. None of the mentioned 3 / 50 3. What are the advantages of BiCMOS? a. All of the mentioned b. Higher gain c. High frequency characteristics d. Better noise characteristics 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Voltage source b. Current source c. Buffer d. Divider 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Buffer b. Infinite on resistance c. Finite off resistance d. Infinite off resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate power dissipation and absorption b. Gate switching delay and net gate power c. Gate switching delay and gate power absorption d. Gate switching delay and gate power dissipation 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Ultraviolet light b. Visible light c. Fluorescent d. Infra red light 9 / 50 9. Which has better I/A? a. CMOS b. pMOS c. Bipolar d. nMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. Etching b. None of the mentioned c. Photo resist d. Doping impurities 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. JFET b. BJT c. Both BJT and MOSFETs d. MOSFET 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical vapour deposition b. Chemical deposition c. Chemical vapour decomposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Channel length b. Effective drain voltage c. Effective source voltage d. Effective gate voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vdd b. Vg c. Vss d. Vds 17 / 50 17. What is the disadvantage of the MOS device? a. Limited current sourcing b. Limited voltage sourcing c. Limited voltage sinking d. Unlimited current sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverters used in series b. Inverter used in parallel c. Switches connected in series d. Switches connected in parallel 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Decreases b. Does not affect c. Increases d. Exponentially decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. None of the mentioned b. Both zero static power dissipation and high input impedance c. Zero static power dissipation d. High Input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Source b. Positive voltage rail c. Drain d. Ground 22 / 50 22. What is the condition for non conducting mode? a. Vgs = Vds = 0 b. Vgs = Vds = Vs = 0 c. Vgs lesser than Vds d. Vds lesser than Vgs 23 / 50 23. CMOS technology is used in developing which of the following? a. Digital logic circuits b. Microcontrollers c. Microprocessors d. All of the mentioned 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Drain region b. Channel region c. Switch region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High on resistance b. High output capacitance c. Low output capacitance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. To perform logic functions b. To amplify the input voltage c. Drive input loads d. Drive output loads 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Cannot be determined b. Increases c. Remains the same d. Decreases 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Remains fairly constant b. Exponentially increases c. Decreases d. Increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Lightly doped n-type epitaxial layer on p-Substrate b. Heavily doped n-type diffused layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Heavily doped n-type epitaxial layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Silicon-di-oxide layer b. Polysilicon layer c. Diffusion layer d. Metal layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Linear region b. Cut-off region c. Non saturation resistive region d. Saturation region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and input voltage c. Input current and output voltage d. Output current and output voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low resistance path b. High resistance path c. High impedance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Increases input capacitance b. Decreasing input capacitance c. Decrease in output capacitance d. Decreasing area occupied 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation or Local Oxidation of Silicon b. None of the mentioned c. Etched field-oxide isolation d. Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. High capacitance b. High resistance c. Low resistance d. Low capacitance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Non symmetrical c. Semi symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. All of the mentioned b. Length channel c. Carrier mobility d. Gate voltage above a threshold 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cg(MOS) lesser than Cbase(bipolar) b. Cg(MOS) = Cbase(bipolar) c. Cs(MOS) lesser than Cbase(bipolar) d. Cg(MOS) greater than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Diffusion b. Dispersion c. Decomposition d. Filtering 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are less sensitive to light b. Positive photo resists are less sensitive to light c. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists d. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. pMOS c. CMOS d. BiCMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Exponentially increases b. Does not effect c. Decreases d. Increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Capacitors b. Switches c. Resistors d. Buffers 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Plasma c. Hydrochloric acid d. Sulphuric acid 46 / 50 46. What are the advantages of E-beam masks? a. Small feature size b. Looser layer c. Complex design d. Larger feature size 47 / 50 47. Which is used for the interconnection? a. Boron b. Oxygen c. Aluminium d. Silicon 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Diffusion process c. Either Diffusion or Ion Implantation Process d. Chemical Vapour Deposition 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Metal layer b. Diffusion layer c. Source d. Drain 50 / 50 50. Surface mobility depends on . . a. Effective drain voltage b. Channel length c. Effective gate voltage d. Effective source voltage Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
