Combinational Logic Design MCQ Quiz {part1} Leave a Comment / Electronics Multiple choice question MCQ Share this 0% 0 votes, 0 avg 4 Created on November 12, 2022Digital electronics Combinational Logic Design {Part 1} 1 / 23 Category: Combinational Logic Design 1. A 4-variable logic circuit can be designed using any of these two 8:1 multiplexers and one 2:1 multiplexer a 16:1 multiplexer an 8:1 multiplexer and one inverter 2 / 23 Category: Combinational Logic Design 2. ABCD to XS-3 code converter can be designed using none of these a 1:16 de multiplexer two 16:1 multiplexers a 16:1 multiplexer 3 / 23 Category: Combinational Logic Design 3. Which logic device is called a distributor? demultiplexer encoder multiplexer decoder 4 / 23 Category: Combinational Logic Design 4. A logic circuit that accepts several data inputs and allows only one of them at a time to get through to the output is called a demultiplexer a transmitter a receiver a multiplexer 5 / 23 Category: Combinational Logic Design 5. A multiplexer is also known as a data selector a data distributor a data restorer a data accumulator 6 / 23 Category: Combinational Logic Design 6. A MUX with its address bits generated by a counter operates as a modified counter parallel-to-serial converter serial-to-parallel converter modified multiplexer 7 / 23 Category: Combinational Logic Design 7. In the hexadecimal to binary priority encoder F (hex) has the lowest priority 0 (hex) has the highest priority 7 (hex) has the lowest priority F (hex) has the highest priority 8 / 23 Category: Combinational Logic Design 8. A demultiplexer with 4-bit select input has one data input and sixteen data output lines one data input and ten data output lines one data input and four data output lines one data input and eight data output lines 9 / 23 Category: Combinational Logic Design 9. A multiplexer with four select bits is a 16:1 multiplexer 4:1 multiplexer 32:1 multiplexer 8:1 multiplexer 10 / 23 Category: Combinational Logic Design 10. A logic circuit that converts an n-input binary code into a corresponding single numeric output is called a code converter an encoder a decoder a converter 11 / 23 Category: Combinational Logic Design 11. The number of 4-line-to-16-line decoders required to make an 8-line-to-256-line decoder is 17 64 16 32 12 / 23 Category: Combinational Logic Design 12. Which of the following logic circuits takes data from a single source and distributes it to one of several output lines? demultiplexer multiplexer decoder encoder 13 / 23 Category: Combinational Logic Design 13. Selection of the input with the higher priority by an encoder is called input selection priority selection none of these arbitration 14 / 23 Category: Combinational Logic Design 14. A combinational logic circuit which is used to send data coming from a single source to two or more separate destinations is called an encoder a demultiplexer a decoder a multiplexer 15 / 23 Category: Combinational Logic Design 15. A 32:1 mux can be designed using two 16:1 muxs and one two input AND gate two 16:1 muxs and one two input OR gate two 16:1 muxs and two two-input OR gates two 16:1 muxs only 16 / 23 Category: Combinational Logic Design 16. The number of 3-line-to-8-line decoders required for selecting 1 out of 64 is 8 9 16 4 17 / 23 Category: Combinational Logic Design 17. A 16:1 multiplexer can be used to design BCD to binary code converter full-adder BCD to 7 segment decoder 4 variable logic function 18 / 23 Category: Combinational Logic Design 18. A BCD-to-decimal decoder is a 3-line to 8-line decoder a 1-line to 10-line decoder any lines to 10-lines decode a 4-line to 10-line decoder 19 / 23 Category: Combinational Logic Design 19. The number of 1:16 demultiplexers required for designing a 4-output 4-variable combinational circuit is 4 1 8 16 20 / 23 Category: Combinational Logic Design 20. What is the largest number of data inputs which a data selector with two control inputs can handle? 16 4 8 2 21 / 23 Category: Combinational Logic Design 21. Selection of the input with the higher priority by an encoder is called none of these input selection priority selection arbitration 22 / 23 Category: Combinational Logic Design 22. A binary-to-octal decoder is a 4-line to 8-line decoder any lines-to-8 line decoder 3-line to 8-line decoder 1-line to 8-line decoder 23 / 23 Category: Combinational Logic Design 23. A Demultiplexer is used to perform arithmetic division perform parity checking steer the data from a single input to one of the many outputs select data from several inputs and route it to a single output Your score is LinkedIn Facebook Twitter VKontakte 0% Restart quiz Exit Send feedback Share this