HomeElectronics Multiple choice question MCQ online testVLSI online test mcq (part1) VLSI online test mcq (part1) Leave a Comment / Electronics Multiple choice question MCQ online test Spread the love 0% Created on July 23, 2023VLSI VLSI (part1) 1 / 50 1. The BiCMOS are preferred over CMOS due to . . . . . . . . a. Switching speed is more compared to CMOS b. All of the mentioned c. Sensitivity is less with respect to the load capacitance d. High current drive capability 2 / 50 2. In nMOS inverter configuration depletion mode device is called as . . . . . . . a. Pull down b. None of the mentioned c. All of the mentioned d. Pull up 3 / 50 3. What are the advantages of BiCMOS? a. Better noise characteristics b. Higher gain c. All of the mentioned d. High frequency characteristics 4 / 50 4. Substrate bias voltage is positive for nMOS. a. True b. False 5 / 50 5. If both the transistors are in saturation, then they act as . . . . . . . . a. Voltage source b. Divider c. Buffer d. Current source 6 / 50 6. In CMOS inverter, transistor is a switch having . . . . . . . . a. Finite off resistance b. Infinite off resistance c. Buffer d. Infinite on resistance 7 / 50 7. Speed power product is measured as the product of . . . . . . . . a. Gate switching delay and gate power absorption b. Gate power dissipation and absorption c. Gate switching delay and net gate power d. Gate switching delay and gate power dissipation 8 / 50 8. In CMOS fabrication, the photoresist layer is exposed to . . . . . . . . a. Fluorescent b. Visible light c. Infra red light d. Ultraviolet light 9 / 50 9. Which has better I/A? a. Bipolar b. nMOS c. CMOS d. pMOS 10 / 50 10. The . . . . . . . . is used to reduce the resistivity of poly silicon. a. None of the mentioned b. Etching c. Doping impurities d. Photo resist 11 / 50 11. The transistors used in BiCMOS are . . . . . . . . a. BJT b. MOSFET c. JFET d. Both BJT and MOSFETs 12 / 50 12. Substrate doping level should be decreased to avoid the latch-up effect. a. True b. False 13 / 50 13. Heavily doped polysilicon is deposited using . . . . . . a. Chemical deposition b. Chemical vapour decomposition c. Chemical vapour deposition d. Dry deposition 14 / 50 14. Surface mobility depends on . . . . . . . . a. Channel length b. Effective source voltage c. Effective gate voltage d. Effective drain voltage 15 / 50 15. BiCMOS inverter requires high load current sourcing a. True b. False 16 / 50 16. Ids depends on . . . . . . . a. Vss b. Vds c. Vdd d. Vg 17 / 50 17. What is the disadvantage of the MOS device? a. Limited voltage sourcing b. Limited current sourcing c. Unlimited current sinking d. Limited voltage sinking 18 / 50 18. Pass transistors are transistors used as . . . . . . . a. Inverter used in parallel b. Switches connected in series c. Switches connected in parallel d. Inverters used in series 19 / 50 19. Increasing fan-out . . . . . . . . the propagation delay. a. Exponentially decreases b. Does not affect c. Increases d. Decreases 20 / 50 20. The MOSFETS are arranged in this configuration to provide . . . . . . . . a. High Input impedance b. Zero static power dissipation c. None of the mentioned d. Both zero static power dissipation and high input impedance 21 / 50 21. For depletion mode transistor, gate should be connected to . . . . . . . . a. Positive voltage rail b. Source c. Ground d. Drain 22 / 50 22. What is the condition for non conducting mode? a. Vds lesser than Vgs b. Vgs = Vds = 0 c. Vgs = Vds = Vs = 0 d. Vgs lesser than Vds 23 / 50 23. CMOS technology is used in developing which of the following? a. Digital logic circuits b. All of the mentioned c. Microprocessors d. Microcontrollers 24 / 50 24. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . a. Channel region b. Drain region c. Switch region d. Bulk region 25 / 50 25. Fast gate can be built by keeping . . . . . . . . a. High output capacitance b. Low output capacitance c. High on resistance d. Input capacitance does not affect speed of the gate 26 / 50 26. In BiCMOS, MOS switches are used to . . . . . . a. To amplify the input voltage b. Drive input loads c. Drive output loads d. To perform logic functions 27 / 50 27. As die size shrinks, the complexity of making the photomasks . . . . . . . a. Increases b. Cannot be determined c. Decreases d. Remains the same 28 / 50 28. The current Ids . . . . . . . . as Vds increases. a. Increases b. Remains fairly constant c. Decreases d. Exponentially increases 29 / 50 29. The n-well collector is formed by . . . . . . . a. Heavily doped n-type epitaxial layer on p-Substrate b. Lightly doped n-type epitaxial layer on p-Substrate c. Lightly doped n-type diffused layer on p-Substrate d. Heavily doped n-type diffused layer on p-Substrate 30 / 50 30. Interconnection pattern is made on . . . . . . a. Metal layer b. Silicon-di-oxide layer c. Diffusion layer d. Polysilicon layer 31 / 50 31. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . .. . . a. Saturation region b. Linear region c. Non saturation resistive region d. Cut-off region 32 / 50 32. Transconductance gives the relationship between . . . . . . . a. Input current and input voltage b. Output current and output voltage c. Input current and output voltage d. Output current and input voltage 33 / 50 33. Latch-up is the generation of . . . . . . . a. Low resistance path b. High resistance path c. High impedance path d. Low impedance path 34 / 50 34. Increasing the transconductance . . . . . . a. Increases input capacitance b. Decreasing input capacitance c. Decreasing area occupied d. Decrease in output capacitance 35 / 50 35. The isolated active areas are created by technique known as . . . . . . a. Etched field-oxide isolation b. None of the mentioned c. Local Oxidation of Silicon d. Etched field-oxide isolation or Local Oxidation of Silicon 36 / 50 36. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path. a. Low resistance b. Low capacitance c. High capacitance d. High resistance 37 / 50 37. MOS transistor structure is . . . . . . a. Pseudo symmetrical b. Non symmetrical c. Semi symmetrical d. Symmetrical 38 / 50 38. Switching speed of a MOS device depends on . . . . . . a. Gate voltage above a threshold b. All of the mentioned c. Carrier mobility d. Length channel 39 / 50 39. Which of the following is true when inputs are controlled by equal amounts of charge? a. Cs(MOS) lesser than Cbase(bipolar) b. Cg(MOS) lesser than Cbase(bipolar) c. Cg(MOS) = Cbase(bipolar) d. Cg(MOS) greater than Cbase(bipolar) 40 / 50 40. N-well is formed by . . . . . . . . a. Dispersion b. Filtering c. Diffusion d. Decomposition 41 / 50 41. Positive photo resists are used more than negative photo resists because . . . . . . . . a. Negative photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the positive photo resists b. Negative photo resists are less sensitive to light c. Positive photo resists are less sensitive to light d. Positive photo resists are more sensitive to light, but their photo lithographic resolution is not as high as that of the negative photo resists 42 / 50 42. Which process produces a circuit which is less prone to latch-up effect? a. nMOS b. BiCMOS c. pMOS d. CMOS 43 / 50 43. Increasing Vsb . . . . . . . . the threshold voltage. a. Increases b. Does not effect c. Decreases d. Exponentially increases 44 / 50 44. Depletion mode MOSFETs are more commonly used as . . . . . . . . a. Switches b. Capacitors c. Buffers d. Resistors 45 / 50 45. In nMOS fabrication, etching is done using . . . . . . . . . a. Sodium chloride b. Plasma c. Hydrochloric acid d. Sulphuric acid 46 / 50 46. What are the advantages of E-beam masks? a. Looser layer b. Larger feature size c. Small feature size d. Complex design 47 / 50 47. Which is used for the interconnection? a. Silicon b. Aluminium c. Boron d. Oxygen 48 / 50 48. The dopants are introduced in the active areas of silicon by using which process? a. Ion Implantation process b. Either Diffusion or Ion Implantation Process c. Chemical Vapour Deposition d. Diffusion process 49 / 50 49. Contact cuts are made in . . . . . . . . . a. Drain b. Metal layer c. Source d. Diffusion layer 50 / 50 50. Surface mobility depends on . . a. Effective source voltage b. Effective drain voltage c. Effective gate voltage d. Channel length Your score is LinkedIn Facebook VKontakte 0% Restart quiz Exit Anonymous feedback Thank you Send feedback Spread the love
