HomeElectronics Multiple choice question MCQ online testCombinational Logic Design MCQ Quiz {part1} Combinational Logic Design MCQ Quiz {part1} 2 Comments / Electronics Multiple choice question MCQ online test Spread the love 0% 0 votes, 0 avg 10 Created on November 12, 2022Digital electronics Combinational Logic Design {Part 1} 1 / 23 Category: Combinational Logic Design 1. A combinational logic circuit which is used to send data coming from a single source to two or more separate destinations is called a. a demultiplexer b. a multiplexer c. a decoder d. an encoder 2 / 23 Category: Combinational Logic Design 2. In the hexadecimal to binary priority encoder a. F (hex) has the lowest priority b. F (hex) has the highest priority c. 7 (hex) has the lowest priority d. 0 (hex) has the highest priority 3 / 23 Category: Combinational Logic Design 3. Which of the following logic circuits takes data from a single source and distributes it to one of several output lines? a. encoder b. multiplexer c. demultiplexer d. decoder 4 / 23 Category: Combinational Logic Design 4. A logic circuit that converts an n-input binary code into a corresponding single numeric output is called a. a converter b. a code converter c. an encoder d. a decoder 5 / 23 Category: Combinational Logic Design 5. Selection of the input with the higher priority by an encoder is called a. input selection b. none of these c. arbitration d. priority selection 6 / 23 Category: Combinational Logic Design 6. A Demultiplexer is used to a. steer the data from a single input to one of the many outputs b. perform parity checking c. perform arithmetic division d. select data from several inputs and route it to a single output 7 / 23 Category: Combinational Logic Design 7. The number of 1:16 demultiplexers required for designing a 4-output 4-variable combinational circuit is a. 1 b. 4 c. 8 d. 16 8 / 23 Category: Combinational Logic Design 8. A binary-to-octal decoder is a a. 4-line to 8-line decoder b. 1-line to 8-line decoder c. 3-line to 8-line decoder d. any lines-to-8 line decoder 9 / 23 Category: Combinational Logic Design 9. A multiplexer is also known as a. a data restorer b. a data accumulator c. a data selector d. a data distributor 10 / 23 Category: Combinational Logic Design 10. What is the largest number of data inputs which a data selector with two control inputs can handle? a. 8 b. 2 c. 16 d. 4 11 / 23 Category: Combinational Logic Design 11. A multiplexer with four select bits is a a. 4:1 multiplexer b. 8:1 multiplexer c. 32:1 multiplexer d. 16:1 multiplexer 12 / 23 Category: Combinational Logic Design 12. A MUX with its address bits generated by a counter operates as a a. parallel-to-serial converter b. modified multiplexer c. serial-to-parallel converter d. modified counter 13 / 23 Category: Combinational Logic Design 13. A logic circuit that accepts several data inputs and allows only one of them at a time to get through to the output is called a. a multiplexer b. a transmitter c. a receiver d. a demultiplexer 14 / 23 Category: Combinational Logic Design 14. A 32:1 mux can be designed using a. two 16:1 muxs and one two input AND gate b. two 16:1 muxs and two two-input OR gates c. two 16:1 muxs and one two input OR gate d. two 16:1 muxs only 15 / 23 Category: Combinational Logic Design 15. The number of 4-line-to-16-line decoders required to make an 8-line-to-256-line decoder is a. 32 b. 17 c. 16 d. 64 16 / 23 Category: Combinational Logic Design 16. A BCD-to-decimal decoder is a. any lines to 10-lines decode b. a 4-line to 10-line decoder c. a 1-line to 10-line decoder d. a 3-line to 8-line decoder 17 / 23 Category: Combinational Logic Design 17. Which logic device is called a distributor? a. multiplexer b. demultiplexer c. encoder d. decoder 18 / 23 Category: Combinational Logic Design 18. A 16:1 multiplexer can be used to design a. 4 variable logic function b. BCD to 7 segment decoder c. BCD to binary code converter d. full-adder 19 / 23 Category: Combinational Logic Design 19. A 4-variable logic circuit can be designed using a. two 8:1 multiplexers and one 2:1 multiplexer b. an 8:1 multiplexer and one inverter c. a 16:1 multiplexer d. any of these 20 / 23 Category: Combinational Logic Design 20. A demultiplexer with 4-bit select input has a. one data input and ten data output lines b. one data input and eight data output lines c. one data input and four data output lines d. one data input and sixteen data output lines 21 / 23 Category: Combinational Logic Design 21. The number of 3-line-to-8-line decoders required for selecting 1 out of 64 is a. 8 b. 9 c. 4 d. 16 22 / 23 Category: Combinational Logic Design 22. Selection of the input with the higher priority by an encoder is called a. none of these b. arbitration c. priority selection d. input selection 23 / 23 Category: Combinational Logic Design 23. ABCD to XS-3 code converter can be designed using a. a 1:16 de multiplexer b. two 16:1 multiplexers c. a 16:1 multiplexer d. none of these Your score isThe average score is 20% LinkedIn Facebook VKontakte 0% Restart quiz Exit Thank you Send feedback Spread the love
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