HomeElectronics Multiple choice question MCQ online testCombinational Logic Design MCQ Quiz {part1} Combinational Logic Design MCQ Quiz {part1} 2 Comments / Electronics Multiple choice question MCQ online test Spread the love 0% 0 votes, 0 avg 10 Created on November 12, 2022Digital electronics Combinational Logic Design {Part 1} 1 / 23 Category: Combinational Logic Design 1. A multiplexer is also known as a. a data selector b. a data distributor c. a data restorer d. a data accumulator 2 / 23 Category: Combinational Logic Design 2. A BCD-to-decimal decoder is a. a 1-line to 10-line decoder b. any lines to 10-lines decode c. a 3-line to 8-line decoder d. a 4-line to 10-line decoder 3 / 23 Category: Combinational Logic Design 3. The number of 3-line-to-8-line decoders required for selecting 1 out of 64 is a. 16 b. 4 c. 8 d. 9 4 / 23 Category: Combinational Logic Design 4. Which of the following logic circuits takes data from a single source and distributes it to one of several output lines? a. multiplexer b. decoder c. demultiplexer d. encoder 5 / 23 Category: Combinational Logic Design 5. A binary-to-octal decoder is a a. 1-line to 8-line decoder b. any lines-to-8 line decoder c. 4-line to 8-line decoder d. 3-line to 8-line decoder 6 / 23 Category: Combinational Logic Design 6. The number of 1:16 demultiplexers required for designing a 4-output 4-variable combinational circuit is a. 8 b. 1 c. 4 d. 16 7 / 23 Category: Combinational Logic Design 7. A 16:1 multiplexer can be used to design a. BCD to binary code converter b. BCD to 7 segment decoder c. 4 variable logic function d. full-adder 8 / 23 Category: Combinational Logic Design 8. Which logic device is called a distributor? a. demultiplexer b. decoder c. encoder d. multiplexer 9 / 23 Category: Combinational Logic Design 9. A logic circuit that converts an n-input binary code into a corresponding single numeric output is called a. a code converter b. a converter c. an encoder d. a decoder 10 / 23 Category: Combinational Logic Design 10. In the hexadecimal to binary priority encoder a. 0 (hex) has the highest priority b. 7 (hex) has the lowest priority c. F (hex) has the lowest priority d. F (hex) has the highest priority 11 / 23 Category: Combinational Logic Design 11. A MUX with its address bits generated by a counter operates as a a. modified counter b. serial-to-parallel converter c. modified multiplexer d. parallel-to-serial converter 12 / 23 Category: Combinational Logic Design 12. A 4-variable logic circuit can be designed using a. two 8:1 multiplexers and one 2:1 multiplexer b. a 16:1 multiplexer c. any of these d. an 8:1 multiplexer and one inverter 13 / 23 Category: Combinational Logic Design 13. ABCD to XS-3 code converter can be designed using a. none of these b. two 16:1 multiplexers c. a 16:1 multiplexer d. a 1:16 de multiplexer 14 / 23 Category: Combinational Logic Design 14. The number of 4-line-to-16-line decoders required to make an 8-line-to-256-line decoder is a. 32 b. 16 c. 64 d. 17 15 / 23 Category: Combinational Logic Design 15. A multiplexer with four select bits is a a. 32:1 multiplexer b. 8:1 multiplexer c. 4:1 multiplexer d. 16:1 multiplexer 16 / 23 Category: Combinational Logic Design 16. A Demultiplexer is used to a. select data from several inputs and route it to a single output b. perform parity checking c. perform arithmetic division d. steer the data from a single input to one of the many outputs 17 / 23 Category: Combinational Logic Design 17. A 32:1 mux can be designed using a. two 16:1 muxs and two two-input OR gates b. two 16:1 muxs only c. two 16:1 muxs and one two input AND gate d. two 16:1 muxs and one two input OR gate 18 / 23 Category: Combinational Logic Design 18. Selection of the input with the higher priority by an encoder is called a. arbitration b. priority selection c. none of these d. input selection 19 / 23 Category: Combinational Logic Design 19. A combinational logic circuit which is used to send data coming from a single source to two or more separate destinations is called a. an encoder b. a decoder c. a demultiplexer d. a multiplexer 20 / 23 Category: Combinational Logic Design 20. Selection of the input with the higher priority by an encoder is called a. input selection b. arbitration c. none of these d. priority selection 21 / 23 Category: Combinational Logic Design 21. A logic circuit that accepts several data inputs and allows only one of them at a time to get through to the output is called a. a transmitter b. a demultiplexer c. a multiplexer d. a receiver 22 / 23 Category: Combinational Logic Design 22. A demultiplexer with 4-bit select input has a. one data input and ten data output lines b. one data input and sixteen data output lines c. one data input and eight data output lines d. one data input and four data output lines 23 / 23 Category: Combinational Logic Design 23. What is the largest number of data inputs which a data selector with two control inputs can handle? a. 4 b. 8 c. 16 d. 2 Your score isThe average score is 20% LinkedIn Facebook VKontakte 0% Restart quiz Exit Thank you Send feedback Spread the love
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