HomeElectronics Multiple choice question MCQ online testCombinational Logic Design MCQ {part2} Combinational Logic Design MCQ {part2} Leave a Comment / Electronics Multiple choice question MCQ online test Share this 0% 0 votes, 0 avg 4 Created on June 12, 2023Digital electronics Combinational Logic Design {part 2} 1 / 24 Category: Combinational Logic Design 1. A full-adder can be realized using a) two half-adders, one AND gate b) two half-adders, two OR gates c) two half-adders, one OR gate d) one half-adder, two OR gates 2 / 24 Category: Combinational Logic Design 2. In which of the following adder circuits is the carry ripple delay eliminated? a) full-adder b) parallel adder c) carry-look-ahead adder d) half-adder 3 / 24 Category: Combinational Logic Design 3. The logic gate used in parity checkers is a) NAND gate b) X-OR gate c) X-NOR gate d) NOR gate 4 / 24 Category: Combinational Logic Design 4. A parallel adder in which the carry-out of each full-adder is the carry-in to the next significant digit adder is called a a) serial carry adder b) parallel carry adder c) ripple carry adder d) look-ahead-carry adder 5 / 24 Category: Combinational Logic Design 5. The minimum number of 2-input NAND gates required to realize a full adder/full-subtractor is a) 6 b) 5 c) 4 d) 3 6 / 24 Category: Combinational Logic Design 6. In a digital system BCD arithmetic is preferred to normal binary arithmetic because a) BCD arithmetic circuits are less expensive than binary arithmetic circuits b) BCD arithmetic circuits are simpler than binary arithmetic circuits c) of ease of operation when input is in BCD format and the output display is decimal d) BCD arithmetic circuits are faster than binary arithmetic circuits 7 / 24 Category: Combinational Logic Design 7. BCD subtraction is performed by using a) S’s complement representation b) 1’s complement representation c) 9’s complement representation d) 2’s complement representation 8 / 24 Category: Combinational Logic Design 8. Which logic gate is a basic comparator? a) NAND gate b) X-NOR gate c) X-OR gate d) NOR gate 9 / 24 Category: Combinational Logic Design 9. Which of the following logic circuits accepts two binary digits on inputs, and produces two binary digits, a sum bit and a carry bit on its outputs? a) full-adder b) parallel adder c) half-adder d) serial adder 10 / 24 Category: Combinational Logic Design 10. The minimum number of 2-input NOR gates required to realize a full-subtractor is a) 12 b) 8 c) 10 d) 9 11 / 24 Category: Combinational Logic Design 11. Parallel adders are a) sequential logic circuits b) Both c) none of these d) combinational logic circuits 12 / 24 Category: Combinational Logic Design 12. A logic circuit that responds to just one input, in accordance with some priority system, among those that may be simultaneously high is called a) an encode b) a priority decoder c) a decoder d) a priority encoder 13 / 24 Category: Combinational Logic Design 13. How many full-adders are required to construct an m-bit parallel adder? a) m/2 b) m c) m+ 1 d) m-1 14 / 24 Category: Combinational Logic Design 14. The minimum number of 2-input NAND/NOR gates required to realize a half-subtractor is a) 4 b) 6 c) 5 d) 3 15 / 24 Category: Combinational Logic Design 15. A serial adder requires only one a) multiplexer b) full-adde c) half-adder d) counter 16 / 24 Category: Combinational Logic Design 16. The minimum number of 2-input NAND/NOR gates required to realize a half-adder is a) 6 b) 4 c) 3 d) 5 17 / 24 Category: Combinational Logic Design 17. The difference output in a full-subtractor is the same as the a) carry output of a full-adder b) sum output of a half-adder c) sum output of a full-adder d) difference output of a half-subtractor 18 / 24 Category: Combinational Logic Design 18. In digital systems subtraction is performed a) by none of these b) using half-adders c) using adders with 1’s complement representation of negative numbers d) using half-subtractors 19 / 24 Category: Combinational Logic Design 19. In BCD addition, 0110 is required to be added to the sum for getting the correct result, if a) none of these b) the sum of two BCD numbers is not a valid BCD number c) a carry is produced d) the suni of two BCD numbers is not a valid BCD number or a carry is produced 20 / 24 Category: Combinational Logic Design 20. How many inputs and outputs does a full-subtractor circuit have? a) two inputs, two outputs b) three inputs, two outputs c) two inputs, one output d) two inputs, three outputs 21 / 24 Category: Combinational Logic Design 21. A device whose inputs are decimal digits and/or alphabetic characters and whose outputs are the coded representations of those inputs is called a) a decimal converter b) a decode c) a code converter d) an encoder 22 / 24 Category: Combinational Logic Design 22. To secure a higher speed of addition, which of the following is the preferred solution? a) serial adder b) full-adder c) parallel adder d) adder with a look-ahead-carry 23 / 24 Category: Combinational Logic Design 23. The adder preferred for applications where circuit minimization is more important than speedis a) parallel adder b) half-adder c) full-adder d) serial adder 24 / 24 Category: Combinational Logic Design 24. How many inputs and outputs does a full-adder have? a) two inputs, one output b) three inputs, two outputs c) two inputs, three outputs d) two inputs, two outputs Your score isThe average score is 2% LinkedIn Facebook Twitter VKontakte 0% Restart quiz Exit Thank you Send feedback Share this